I3C Bus Introduction

I3C Bus is a serial communication bus. It is in fact a migration from the legacy I²C Bus, initially intended for mobile applications as a single interface that could be used for all digitally interfaced sensors.

In principle, I3C is a serial communication interface implemented using a complementary metal oxide semiconductor (CMOS) I/O, which uses a two-wire interface to minimize pin counts and number of signal paths between components.

The I3C specification takes its name from, uses the same electrical connections as, and allows some backward compatibility with, the I²C bus, a de facto standard for inter-chip communication, widely used for low-speed peripherals and sensors in computer systems.

The I3C standard is designed to retain some backward compatibility with the I²C system, notably allowing designs where existing I²C devices can be connected to an I3C bus but still have the bus able to switch to a higher data rate for communication at higher speeds between compliant I3C devices. 

That is, I3C is a specification to enable communication between computer chips by defining the electrical connection between the chips and signaling patterns to be used.

Short for Improved Inter Integrated Circuit, the standard defines the electrical connection between the chips to be a two wire, shared (multidrop), serial data bus, one wire (SCL) being used as a clock to define the sampling times, the other wire (SDA) being used as a data line whose voltage can be sampled.

The standard defines a signaling protocol in which multiple chips can control communication and thereby act as the bus controller.  Source Wikipedia ⇱

As said before, MIPI I3C is a follow on to I²C but it has major improvements in use and power and performance, and it is an optional alternative to SPI for mid-speed (equivalent to 30 Mbps).

Obviously, it is an evolutionary specification that builds upon the legacy I²C standard. The aim is to reduce the number of physical pins used in sensor system integration and supports low-power, high-speed digital communication typically associated with UART and SPI  interfaces so that I3C becomes a single interface combining all the capabilities of the legacy interfaces.

The I3C Protocol has a multi-drop bus which, at 12.5 MHz, is over 12 times faster than what I²C supports while using significantly less power. The key features include backward compatibility with legacy I2C, multi-master and multi-drop capabilities, dynamic addressing, in-band interrupts, hot-join support, etc.

Note at this point that the MIPI I3C interface uses an I²C-like interface with an open drain data line (SDA) and a push-pull clock line (SCL).

The open drain SDA line allows for slaves to take control of the data bus and initiate interrupts. The push-pull SCL line is used by the master to clock the communication bus up to 12.5 MHz.

I3C and I3C Basic FAQs https://www.mipi.org/resources/i3c-frequently-asked-questions ↗

The first I3C interfaced sensor we saw in practice was the BMP581 absolute barometric pressure sensor. 

The BMP581 Sensor offers outstanding design flexibility, providing a single package solution that we can easily integrate into a multitude of existing and upcoming devices such as GPS modules, wearables, hearables, smart home, IoT and industrial products. Here's the Datasheet PDF ↗

More information will follow shortly...